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분자전자 부문위원회
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포스터발표
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Thermal evaporated uniform high-k gate dielectric layer for 2D semiconductor transistors
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내용
The demand for high-k gate dielectric insulators is constantly increasing with ongoing advances in two-dimensional (2D) semiconductor transistors as a candidate for down-scaled post-silicon electronics. However, conventional ALD fabricated high-k dielectrics on 2D surfaces show poor morphology, due to difficulties in binding ALD precursors to van der Waals 2D surfaces. Here, we report the fabrication TeO2 high-k dielectric layers with uniform film quality through thermal evaporation and RF sputtering, which are methods unaffected by van der Waals surfaces. The resulting TeO2 layers demonstrate a high dielectric constant of 33 at 1000 Hz. Leakage current levels showed moderate values, reaching the low power limit at 1.3 MV cm-1 and the gate limit at 1.6 MV cm-1. Our findings suggest the potential of utilizing TeO2 as an alternative high-k gate dielectric compatible with 2D semiconductor transistors.
발표코드
3PS-249
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