Interfacial Engineering of Thin-Film Transistors for Multifunctional Electronics

Heterojunctions formed between dissimilar semiconducting layers provide an effective strategy for tailoring charge transport and interfacial electronic properties in thin-film electronic devices. In this study, we demonstrate multifunctional thin-film transistors (TFTs) based on a horizontally integrated heterojunction architecture composed of p-type and n-type semiconducting layers. By engineering the interfacial structure and layer thickness, the devices exhibit systematic threshold-voltage modulation and enhanced charge transport characteristics. The heterojunction structure simultaneously functions as a charge transport pathway and carrier blocking interface, enabling controllable carrier injection and accumulation. Through optimization of the deposition sequence and active layer configuration, a wide threshold-voltage shift and stable transistor operation are achieved. Interfacial chemical analysis reveals that defect distribution and carrier transport behavior at the heterointerface play a key role in determining the electrical characteristics. In addition to transistor operation, the proposed device architecture exhibits multifunctional electronic behaviors including ambipolar transport characteristics and negative differential resistance (NDR). These properties enable potential applications in low-power logic and multifunctional electronic systems. The results suggest that heterointerface engineering can provide a versatile platform for next-generation thin-film electronics and integrated functional devices.