Mixed Transconductance Field-Effect Transistor based on Tellurium/Indium Gallium Zinc Oxide with Partially Overlapped Heterostructures
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초록
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The recent advent of multiple-valued logic (MVL) for low power consumption and high information density has increased the importance role of transconductance. In particular, the negative differential conductance (NDT), which reduces the drain current during gate voltage sweeping, contributes to simplifying the implementation of the ternary logic circuits. Here, we propose a mixed transconductance (MT) TFT using partially overlapped heterojunction tellurium (Te) and indium gallium zinc oxide (IGZO) as the channel. The proposed devices exhibit sequential appearances of positive differential transconductance (PDT), NDT, and zero differential transconductance (ZDT) in drain current with gate voltage sweeping. The unique electrical properties are explained with equivalent circuit model consisting of IGZO TFT, Te TFT, and Te/IGZO TFT. Also, ternary inverter was implemented by connecting Te TFT to MT TFT, and the configuration was converted to a binary inverter under light illumination.